HW 1 review
October 6, 2006
f = Sigma ( 0,1,6,8,12) + d(2,3,14,15) note: think d means either
sop
ab\cd 00 01 11 10
00 0 1 3 2
01 4 5 7 6
11 12 13 15 14
10 8 9 11 10
ab\cd 00 01 11 10
00 1 1 x x
01 1
11 1 x x
10 1
look for group of 4, top row: a’b’
look for groups of 2, bottom left: ac’d’
middle right: bcd’
pos
ab\cd 00 01 11 10
00 0 0 1 1
01 1 1 0 1
11 1 1 1 1
10 0 0 x 0
4’s: ab’ + b’c’
1’s: a’bcd
f = ab’+b’c’ + a’bcd
switch to products
f = (ab’)’ * (b’c')’ * (a’bcd)’
demorgans again
f = (a’+b) * (b + c) * (a + b’ + c’ + d’)
CMOS
PMOS (fig 1.)
NMOS (fig 2.)
CMOS (fig 3.)
f = a’
a f P N
0 1 1 0
1 0 0 1
either P or N is connected, but not both
F = ab+c
a b c f P N
0 0 0 0 0 1
0 0 1 1 1 0
0 1 0 0 0 1
0 1 1 1 1 0
1 0 0 0 0 1
1 0 1 1 1 0
1 1 0 1 1 0
1 1 1 1 1 0
(if f is 1, P is 1, if f is 0, N is 1)
fig 4.
2 Level logic
September 27, 2006
CMOS transmission gate (TG)
Takes both C and C’ and passes them into nmos and pmos allowing the transmission of either high or low
Review: nmos is good at transmitting low and pmos is good at transmitting hight
Practice:
Construct: (cb)’ + (cb)
Minimize: (a + b’)(a’b + cd)’
(a + b’)((a’b)’ * (cd)’) (demorgans law (ab)’ goes to a’+b’)
(a + b’)(a+b’)(c’ +d’) (demorgans the squal)
(a + b’)(c’ + d’) ( aa becomes a)
Product of Sums (two sums being multiplied)
a’b’ + ab = (a+b’)(a’+b)
Shor hand for 2 level logic
sop = sigma(0,1,5)
a b c f
0 | 0 | 0 | 1
0 | 0 | 1 | 1
1 | 0 | 1 | 1
rest are 0
or a’b'c’ + a’b'c +ab’c
pos is pi(3,4) = (a’ +b +c)(a+b’+c’)
